View ES1980S_239611.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ESS Technology, Inc.
DESCRIPTION
The ES1980 MaestroTM-3 PCI audio-modem accelerator combines advanced audio and modem functionality in a highly integrated PCI solution for notebook systems. It uses the highbandwidth PCI bus to deliver advanced PC audio features, such as HRTF 3D positional audio, DirectSound acceleration and DVD AC-3 5.1 to 2 speaker virtualization. The ES1980 implements multistream DirectSoundTM and DirectSound3DTM acceleration with digital mixing, sample rate conversion, and HRTF 3D filtering. The ES1980 maintains full DOS legacy audio compatibility over the standard PCI 2.1 and PCI 2.2 buses. The ES1980 is designed for high-performance consumer multimedia notebook PC applications. The ES1980 includes a programmable audio signal processor and provides simultaneous support for multiple audio streams. With its built-in DSP core, the ES1980 uses its dedicated direct memory access (DMA) engine to handle complex signal processing tasks with a bus-mastering PCI interface. The support functions ensure efficient transfer of audio data streams to and from system memory buffers, providing a system solution with maximum performance and minimal host CPU loading. The architecture enables implementation of communications over the Internet from multiple sources. The ES1980 incorporates an HSP modem interface via its ACLink connecting with the ES2828 MC`97 codec. The MC`97 is used as the analog front end for the modem and DAA control. The V.90 modem runs on the host while the ES1980 serves as the bidirectional buffer for data transmission and reception. The modem functions include the standard AT command set, V.42bis and Group 3 fax. The ES1980, which operates at 3.3V digitally, is compliant with the Advanced Power Management (APM) 1.2, Advanced Configuration and Power Interface (ACPI) 1.1, and PCI Power Management Interface (PPMI) 1.1. The ES1980 supports D0, D1, D2, and D3 power-saving modes for power efficiency when the audio system is both active and idle. The ES1980 provides a high-quality docking solution and supports an AC-link based digital docking solution with its secondary AC`97 Extension 2.1 compliant interface. CLKRUN# pin support can be used to stop the PCI interface clock. This helps achieve the lowest power consumption in D3hot state. The ES1980 provides full DOS game compatibility through three hardware implementations: PC/PCI, distributed DMA (DDMA), and transparent DMA (TDMA). The ES1980 is available in an industry-standard 100-pin lowprofile quad flat pack (LQFP) package.
ES1980 MaestroTM-3 PCI Audio-Modem Accelerator Product Brief
AUDIO FEATURES
* * * * * * * * * * * * *
High-performance PCI audio acceleration Multistream DirectSound and DirectSound 3D acceleration Sensaura(R) CRL(R) positional 3D High-quality sample rate conversion and digital mixing AC-3 speaker virtualization Direct music support Realtime effects processing Digital docking with secondary AC-Link S/PDIF output for DVD content EEPROM interface for SID and SVID Full legacy DOS game support using PC/PCI, DDMA, or TDMA hardware implementation methods Supports up to two additional PCI bus master devices V.90 HSP modem interface via MC`97 link
POWER MANAGEMENT * Compliance with APM 1.2, ACPI 1.1, and PPMI 1.1 * Compliance with Intel's Mobile Power Guidelines `99 * 3.3V digital operation with 5V-tolerant inputs COMPATIBILITY * Supports PC games and applications for SoundBlasterTM and
SoundBlaster ProTM
* Meets PC99/PC2001 and WHQL specifications * Compliant with Intel's audio-modem riser card and mini-PCI
specifications
MODEM FEATURES * Data mode capabilities:
--- --- --- --- --- --- --- V.90 56 kbps V.34 33.6 kbps and fallbacks Standard AT command set V.42 (LAPM) and MNP4 error correction V.42bis/MNP 5 data compression ITU-T V.17, V.21 ch2, V.27ter, V.29 Group 3 (TIA/EIA 578 Class 1 and Class 2)
* Fax Mode capabilities:
* Supports wake-on-ring from D3hot and D3cold state
ESS Technology, Inc.
SAM0367-022101
1
ES1980 PRODUCT BRIEF
PINOUT
Figure 1shows the ES1980 pinout diagram.
GN D GD7 GD6 GD5 GD4 G D 3/ V O LD N #/ E CL K G D 2/ V O LU P #/ E DI N G D 1/ E DO U T GD0 VDD OSCO O SC I G ND G PI O 1 1 / SI R Q/ S PD I FO G PI O 3/ S RS T 2 # G PI O 0/ S RS T 1 # S CL K 2 S DO 2 S DF S 2 S DI 2 V AU X D ET V AU X P ME # R I NG # / M C 9 7 D I SDI1
75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
SCLK1 SDFS1 GPIO1/GS0/GT0# SDO1 TXD RXD GPIO13/PCREQ# C24/GPIO15/SPDIFO RST# INT# VDD PCICLK GND GNT# REQ# GND AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 VDD
ES1980S Maestro-3 100-Pin LQFP
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
GPIO5/VOLUP# GPIO4/VOLDN# GPIO14/R1# GPIO10/GS1/GT1# GPIO7 G P I 0 8 / I 2S D A T A G P I O 1 2 / I 2S L R CLKRUN#/ECS G P I O 6 / I 2S C L K GND AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 VDD CBE0# AD8 AD9 AD10 AD11 AD12
Figure 1 ES1980 Maestro-3 Pinout Diagram
ES1980 PIN DESCRIPTIONS
Table 1 lists the ES1980 pin descriptions. Table 1
Name C/BE[3:0]# IDSE GPIO9 PCGNT# GND AD[31:0] VDD FRAME# IRDY# TRDY# DEVSEL# STOP# R0# 19 GPIO2 PAR 20 I/O I/O 3, 22, 41, 63, 75, 88, 91 4:11, 23:30, 33:40, 92:99 12, 32, 66, 86, 100 14 15 16 17 18 2
ES1980 Pin Descriptions
Pin Numbers 1, 13, 21, 31 I/O I/O I I/O O I I/O I I/O I/O I/O I/O I/O I Descriptions PCI command/byte enable pins. During address phase of a transaction, these pins define the bus command. During data phase, these pins define the byte enable. ID select. General-purpose input/output; internally pulled up to VDD. PC/PCI grant input. Digital ground. Address and data lines from the PCI bus. Digital supply voltage, 3.3V. Cycle frame. Initiator ready. Target ready. Device select. Stop transaction. Use as PCI bus request 0 input from external PCI master device by enabling PCIx2 arbiter bit PCI 58h [0] = 1. General-purpose input/output. Parity.
2
SAM0367-022101
CB E 3 # I D S E L/ G PI O 9/ P CG N T# G ND AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 V DD CB E 2 # F RA M E# I R D Y# TR D Y# D E VS EL # S T OP # G PI O 2 / R 0 # PAR CBE1# G ND AD15 AD14 AD13
ESS Technology, Inc.
ES1980 PRODUCT BRIEF
Table 1
ES1980 Pin Descriptions (Continued)
Pin Numbers 42 I/O I I/O I/O 43 O I 44 I/O I 45 I/O 46 I/O O 47 O I/O I 48 I/O I 49 I/O I 50 I/O 51 I I 52 I 53 54 55 O I I General-purpose input/output; internally pulled up to VDD. General-purpose input/output; internally pulled up to VDD. Grant to PCI master directly and is enabled by PCI 58h [11] = 1 and PCI 58h [10] = 1. Grant-Select 1 output to control external quick switch to grant PCI master phase and is enabled by PCI 58h [11] = 0 and PCI 58h [10] = 1. General-purpose input/output; internally pulled up to VDD. PCI bus request 1 input pin from external PCI master device by enabling second PCIx2 arbiter bit PCI 58h [10] = 1. General-purpose input/output; internally pulled up to VDD. Active-low signal. Hardware volume down control and is enabled by PCI 52h [7] = 1 and PCI 52h [5] = 0. General-purpose input/output; internally pulled up to VDD. Active-low signal. Hardware volume up control and is enabled by PCI 52h [7] = 1 and PCI 52h [5] = 0. General-purpose input/output; internally pulled up to VDD. Primary AC-Link serial data input; internally pulled up to VDD. Enable primary codec by setting Maestro_Base+36h [12] = 1. Use as Modem Codec data input pin by enabling the PCI 5Ch [5] =1 and Maestro_Base+38h [3] to 1; internally pulled up to VDD. Ring detect; enabled by PCI 5Ch [5] = 0. PME# output pin to wake up the system by enabling PME_EN bit (C5h [0] = 1). 3.3VAUX voltage supply input. VAUX support detection. VAUXDet pin needs to be driven high to indicate ACPI is supported with D3cold state and driven low to indicate ACPI is not supported with D3cold state. Secondary AC-link serial data input. Enable secondary codec by setting Maestro_Base+38h [5] to 1; internally pulled up to VDD. Secondary AC-link serial data frame sync output pin. Enable second codec by setting Maestro_Base+38h [5] to 1. If a pull-down resistor (2.2 k ohm) is used, then the device is set as a multifunction device. Otherwise, the ES1980 is set as a single-function audio-only device; internally pulled up to VDD. Secondary AC-link serial data output; internally pulled down to GND. Enable second codec by setting Maestro_Base+38h [5] to 1. Secondary AC-link serial data clock output pin for multi-codec configurations and secondary AC-Link interface. Enable second codec by setting Maestro_Base+38h [5] to 1. Can be pulled down to GND via a 2.2k ohm resistor to internally fix IDSEL and leave pin 2 free for other function use. Primary AC`97 codec reset output. General-purpose input/output; internally pulled up to VDD. Secondary AC`97 codec reset output. General-purpose input/output; internally pulled up to VDD. Serialized IRQ; internally pulled up to VDD. Enabled by PCI 40h [14] = 1. Sony/Philips Digital Interface output. Enabled by PCI 52h [8] = 1 and PCI 58h [1] =0 and Maestro_Base+38h [4] = 1. General-purpose input/output; internally pulled up to VDD. 49.152-MHz crystal input. Not a 5V-tolerant pin.
2
Names I SCLK
2
Descriptions I S serial clock input; enabled by setting Maestro_Base+36h [15] to 1. General-purpose input/output; internally pulled up to VDD. Input/output for PCI clock status and an output to start or accelerate clock function by enabling PCI 52h [11] = 1. Chip select output pin to EEPROM chip select input. ECS goes active after power-on reset and goes inactive automatically after EEPROM cycle is complete. I2S frame sync input; enabled by setting Maestro_Base+36h [15] to 1. General-purpose input/output; internally pulled down to GND. I2S data input pin and is enabled by setting Maestro_Base+36h [15] to 1.
GPIO6 CLKRUN# ECS I2SLR GPIO12 I2SDATA GPIO8 GPIO7 GT1# GS1 GPIO10 R1# GPIO14 VOLDN# GPIO4 VOLUP# GPIO5 SDI1 MC97DI RING# PME# VAUX VAUXDet SDI2 SDFS2
56 57
I I/O
SDO2 SCLK2
58 59
O I/O
SRST1# GPIO0 SRST2#
O 60 I/O O 61 I/O I/O 62 O I/O
GPIO3 SRIQ SPDIFO GPIO11
OSCI
64
I
ESS Technology, Inc.
SAM0367-022101
3
ES1980 PRODUCT BRIEF
Table 1
Name OSCO GD[0] GD[1] EDOUT GD[2] EDIN VOLUP# GD[3] ECLK VOLDN# GD[4:7] SCLK1 SDFS1 GT0# GS0 GPIO1 SDO1 TXD RXD PCREQ#
ES1980 Pin Descriptions (Continued)
Pin Numbers 65 67 I/O O I/O I/O 68 O I/O 69 I I I/O 70 O I 71:74 76 77 I I O O 78 O I/O 79 80 81 O O I O 82 I/O O 83 O O 84 85 87 89 90 I O I I O 49.152-MHz crystal output. Game port data input/output. Game port data input/output. Data output to EEPROM data input. EDOUT goes active after power-on reset goes inactive automatically after EEPROM cycle is complete. Game port data input/output. Data input from EEPROM data output. Hardware volume control enabled by PCI 52h [7] = 1 and PCI 52h [5] = 1. Game port data input/output. Clock output to EEPROM clock input. ECLK goes active after power-on reset and goes inactive automatically after EEPROM cycle is complete. Hardware volume down control enabled by PCI 52h [7] = 1 and PCI 52h [5] = 1. Game port data input; internally pulled up to VDD. Primary AC-Link serial clock; enabled by setting Maestro_Base+36h [12] =1. Internally pulled up to VDD. Primary AC-Link serial data frame sync; enabled by setting Maestro_Base+36h [12] =1. Internally pulled up to VDD. Grant to PCI master directly by enabling PCI 58h [0] = 1 and PCI 58h [11] = 1. Grant select 0 output to control external quick switch to grant PCI master phase by enabling PCIx2 arbiter bit PCI 58h [0] = 1 and PCI 58h [11] = 0. General-purpose input/output; internally pulled up to VDD. Primary AC-Link serial data out enabled by setting Maestro_Base+36h[12]=1; internally pulled up to VDD. MIDI transmit data output (default). Select as MIDI transmit output pin by enabling PCI 40h [3] = 1; internally pulled up to VDD. MIDI receive data input (default). Select as MIDI receive input pin by enabling PCI 40h [3] = 1; internally pulled down to GND. Use as PC/PCI request output by setting PCI 50h [10:8] = 010. General-purpose input/output; internally pulled down to GND. 24.576-MHz clock output for codec clock source. S/PDIF output; enabled by setting bit PCI 52h [8] = 1 and bit PCI 58h [1] = 1, and setting Maestro_Base+38h[4]=1. General-purpose output-only; internally pulled up to VDD. Reset. Interrupt request. PCI bus clock. PCI Bus master grant. PCI Bus master request. Descriptions
GPIO13 C24 SPDIFO GPIO15 RST# INT# PCICLK GNT# REQ#
ORDERING INFORMATION
Part Number ES1980S Description PCI Audio-Modem Accelerator Package 100-pin LQFP
ESS Technology, Inc. 48401 Fremont Blvd. Fremont, CA 94538 Tel: (510) 492-1088 Fax: (510) 492-1898
4
No part of this publication may be reproduced, stored in a retrieval system, transmitted, or translated in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without the prior written permission of ESS Technology, Inc. ESS Technology, Inc. makes no representations or warranties regarding the content of this document. All specifications are subject to change without prior notice.
ESS Technology, Inc. assumes no responsibility for any errors contained herein. (P) U.S. patents pending. Maestro is a registered trademark of ESS Technology, Inc. All other trademarks are owned by their respective holders and are used for identification purposes only.
(c) 2001 ESS Technology, Inc. All rights reserved.
SAM0367-022101

▲Up To Search▲

Price & Availability of ES1980S

	To Download ES1980S Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .